Here is the thing I am trying to acheive video transmission and Reception using OFDM TX/RX example design at : https://www.mathworks.com/help/soc/ug/ofdm-transmit-and-receive-using-analog-devices-ad9361-ad9364.html. But in this design the payload data is inside and demodulated data is also not present as output. I successfully ran this example on my ADRV9009 + ZCU102 board and the results were great. Than I moved to modifiaction of this design I moved the Payload data subsystem outside the DUT and dataOut and valid aswell. At this moment the design breaks(although it is working fine in Simulink) and in my PL using ILA i saw data out and data valid always as zero. I have been debugging it for quite some time but cannot find the answer.Here is the thing I am trying to acheive video transmission and Reception using OFDM TX/RX example design at : https://www.mathworks.com/help/soc/ug/ofdm-transmit-and-receive-using-analog-devices-ad9361-ad9364.html. But in this design the payload data is inside and demodulated data is also not present as output. I successfully ran this example on my ADRV9009 + ZCU102 board and the results were great. Than I moved to modifiaction of this design I moved the Payload data subsystem outside the DUT and dataOut and valid aswell. At this moment the design breaks(although it is working fine in Simulink) and in my PL using ILA i saw data out and data valid always as zero. I have been debugging it for quite some time but cannot find the answer. Here is the thing I am trying to acheive video transmission and Reception using OFDM TX/RX example design at : https://www.mathworks.com/help/soc/ug/ofdm-transmit-and-receive-using-analog-devices-ad9361-ad9364.html. But in this design the payload data is inside and demodulated data is also not present as output. I successfully ran this example on my ADRV9009 + ZCU102 board and the results were great. Than I moved to modifiaction of this design I moved the Payload data subsystem outside the DUT and dataOut and valid aswell. At this moment the design breaks(although it is working fine in Simulink) and in my PL using ILA i saw data out and data valid always as zero. I have been debugging it for quite some time but cannot find the answer. hdl, hdl coder, ip core generation MATLAB Answers — New Questions
