errors with Simscape and SSC HDL Coder Workflow Advisor
hello, I’m having some really frustrating problems with Simscape and sschdladvisor.
there is going to be a lot of context up ahead, but I assure you it isn’t very dense at all.
—
initially, I tried following this document to generate HDL code, where they load the Full Wave Bridge Rectifier example. after following along and executing the workflow advisor tool, though, I’m met with the following warning at the very end (I renamed the simulink file to "fwbr"):
Warning
Run hdlsetup on the model ‘fwbr’ to modify configuration parameter values recommended for HDL code generation and rerun the workflow. Generated implementation model ‘gmStateSpaceHDL_fwbr’ with the ‘HDL settings’. The HDL Algorithm requires latency. Each output port experiences 1 additional delay.
but this is essentially an error, because it does not in fact generate the "gmStateSpaceHDL_fwbr" model. when I try opening it, I get the following error:
‘C:UsersCrisDocumentsMATLABssc_bcsschdlfwbrgmStateSpaceHDL_fwbr’ is not a valid Simulink object name and there is no file with that name.
there’s absolutely no configuration in the model nor in the Workflow Advisor I can use to make this warning go away.
I then run into the command sschdl.generateOptimizedModel, which was introduced in the R2024a version of MATLAB, which can replace all the Simscape components that might cause issues for HDL code generation into their dynamic block equivalent. after this and after making sure the generated optimized model is behaviourally identical, I can finally execute the Workflow Advisor with no problems.
—
after that, I try following along a different example, the Halfwave Rectifier model. this one executes flawlessly right off the bat and I get a dynamic system equivalent model out of the Workflow Advisor, for which I can then generate VHDL code with 0 issues.
—
I then try to make my own simscape system, a simple buck converter:
but I run into exactly the same issue as I did with the full wave bridge rectifier where it would throw that "warning" that wouldn’t let me actually generate the HDL coder adapted model. I then find this document with a buck converter model example, which executes flawlessly. this part in particular puzzles me, because in an attempt to find the problem with my own implementation I start moving parameters around both in the system and in the model settings themselves. eventually, I end up straight up copy-pasting the entire system into my own .slx file, and configure every single setting to be exactly the same as the example’s, and it still won’t let me generate the model by showing me that warning from before.
I tried applying the generateOptimizedModel command, but to my dismay it completely changed the behaviour of my circuit, and I could pinpoint that the one block causing the change in behaviour was the ideal switch’s replacement. this actually happens in every circuit where I use the generateOptimizedModel command and there are any switches. the command works, and it lets me generate the HDL Coder-adapted system with no warnings, but I cannot use it if my system now behaves differently.
—
phew, that should be all.
this is genuinely extremely confusing to me, from the fact that some default examples work right out of the box and some don’t, to the fact that two systems that are exactly the same in quite literally everything except the fact they’re different files don’t produce the same result when running them through sschdladvisor. for anyone who might have the slightest idea to what’s going on, I would be eternally grateful if you could tell me what the problem can be. the only thing I can think of is that something might have broken in some update since 2022.hello, I’m having some really frustrating problems with Simscape and sschdladvisor.
there is going to be a lot of context up ahead, but I assure you it isn’t very dense at all.
—
initially, I tried following this document to generate HDL code, where they load the Full Wave Bridge Rectifier example. after following along and executing the workflow advisor tool, though, I’m met with the following warning at the very end (I renamed the simulink file to "fwbr"):
Warning
Run hdlsetup on the model ‘fwbr’ to modify configuration parameter values recommended for HDL code generation and rerun the workflow. Generated implementation model ‘gmStateSpaceHDL_fwbr’ with the ‘HDL settings’. The HDL Algorithm requires latency. Each output port experiences 1 additional delay.
but this is essentially an error, because it does not in fact generate the "gmStateSpaceHDL_fwbr" model. when I try opening it, I get the following error:
‘C:UsersCrisDocumentsMATLABssc_bcsschdlfwbrgmStateSpaceHDL_fwbr’ is not a valid Simulink object name and there is no file with that name.
there’s absolutely no configuration in the model nor in the Workflow Advisor I can use to make this warning go away.
I then run into the command sschdl.generateOptimizedModel, which was introduced in the R2024a version of MATLAB, which can replace all the Simscape components that might cause issues for HDL code generation into their dynamic block equivalent. after this and after making sure the generated optimized model is behaviourally identical, I can finally execute the Workflow Advisor with no problems.
—
after that, I try following along a different example, the Halfwave Rectifier model. this one executes flawlessly right off the bat and I get a dynamic system equivalent model out of the Workflow Advisor, for which I can then generate VHDL code with 0 issues.
—
I then try to make my own simscape system, a simple buck converter:
but I run into exactly the same issue as I did with the full wave bridge rectifier where it would throw that "warning" that wouldn’t let me actually generate the HDL coder adapted model. I then find this document with a buck converter model example, which executes flawlessly. this part in particular puzzles me, because in an attempt to find the problem with my own implementation I start moving parameters around both in the system and in the model settings themselves. eventually, I end up straight up copy-pasting the entire system into my own .slx file, and configure every single setting to be exactly the same as the example’s, and it still won’t let me generate the model by showing me that warning from before.
I tried applying the generateOptimizedModel command, but to my dismay it completely changed the behaviour of my circuit, and I could pinpoint that the one block causing the change in behaviour was the ideal switch’s replacement. this actually happens in every circuit where I use the generateOptimizedModel command and there are any switches. the command works, and it lets me generate the HDL Coder-adapted system with no warnings, but I cannot use it if my system now behaves differently.
—
phew, that should be all.
this is genuinely extremely confusing to me, from the fact that some default examples work right out of the box and some don’t, to the fact that two systems that are exactly the same in quite literally everything except the fact they’re different files don’t produce the same result when running them through sschdladvisor. for anyone who might have the slightest idea to what’s going on, I would be eternally grateful if you could tell me what the problem can be. the only thing I can think of is that something might have broken in some update since 2022. hello, I’m having some really frustrating problems with Simscape and sschdladvisor.
there is going to be a lot of context up ahead, but I assure you it isn’t very dense at all.
—
initially, I tried following this document to generate HDL code, where they load the Full Wave Bridge Rectifier example. after following along and executing the workflow advisor tool, though, I’m met with the following warning at the very end (I renamed the simulink file to "fwbr"):
Warning
Run hdlsetup on the model ‘fwbr’ to modify configuration parameter values recommended for HDL code generation and rerun the workflow. Generated implementation model ‘gmStateSpaceHDL_fwbr’ with the ‘HDL settings’. The HDL Algorithm requires latency. Each output port experiences 1 additional delay.
but this is essentially an error, because it does not in fact generate the "gmStateSpaceHDL_fwbr" model. when I try opening it, I get the following error:
‘C:UsersCrisDocumentsMATLABssc_bcsschdlfwbrgmStateSpaceHDL_fwbr’ is not a valid Simulink object name and there is no file with that name.
there’s absolutely no configuration in the model nor in the Workflow Advisor I can use to make this warning go away.
I then run into the command sschdl.generateOptimizedModel, which was introduced in the R2024a version of MATLAB, which can replace all the Simscape components that might cause issues for HDL code generation into their dynamic block equivalent. after this and after making sure the generated optimized model is behaviourally identical, I can finally execute the Workflow Advisor with no problems.
—
after that, I try following along a different example, the Halfwave Rectifier model. this one executes flawlessly right off the bat and I get a dynamic system equivalent model out of the Workflow Advisor, for which I can then generate VHDL code with 0 issues.
—
I then try to make my own simscape system, a simple buck converter:
but I run into exactly the same issue as I did with the full wave bridge rectifier where it would throw that "warning" that wouldn’t let me actually generate the HDL coder adapted model. I then find this document with a buck converter model example, which executes flawlessly. this part in particular puzzles me, because in an attempt to find the problem with my own implementation I start moving parameters around both in the system and in the model settings themselves. eventually, I end up straight up copy-pasting the entire system into my own .slx file, and configure every single setting to be exactly the same as the example’s, and it still won’t let me generate the model by showing me that warning from before.
I tried applying the generateOptimizedModel command, but to my dismay it completely changed the behaviour of my circuit, and I could pinpoint that the one block causing the change in behaviour was the ideal switch’s replacement. this actually happens in every circuit where I use the generateOptimizedModel command and there are any switches. the command works, and it lets me generate the HDL Coder-adapted system with no warnings, but I cannot use it if my system now behaves differently.
—
phew, that should be all.
this is genuinely extremely confusing to me, from the fact that some default examples work right out of the box and some don’t, to the fact that two systems that are exactly the same in quite literally everything except the fact they’re different files don’t produce the same result when running them through sschdladvisor. for anyone who might have the slightest idea to what’s going on, I would be eternally grateful if you could tell me what the problem can be. the only thing I can think of is that something might have broken in some update since 2022. fpga, simscape, hdl coder, sschdl MATLAB Answers — New Questions