Hi everyone,
I am having trouble clearing the Trip Zone flags for ePWM1 on a TMS320F28379D using the Register Read/Write blocks in Simulink.
System Configuration:
Hardware: TMS320F28379D (CPU1).
Software: MATLAB/Simulink (Embedded Coder).
Logic: I have two Register Read/Write blocks configured for Write operation:
Target: EPwm1Regs.TZCLR, bit field: OST.
Target: EPwm1Regs.TZOSTCLR, bit field: OST1.
Input: A uint16 constant of 1 is fed into both blocks.

The Issue:I am monitoring EPwm1Regs.TZFLG and EPwm1Regs.TZOSTFLG using a Scope. Even when the clear command is triggered, these flags stay at 1 and never transition to 0.
Confirmed details:
ISR Execution: The blocks are placed inside an ISR. I’ve verified the ISR is running correctly using a counter variable that increments as expected.
Register Behavior: I am aware that TZCLR and TZOSTCLR are "Write-1-to-Clear" (Self-clearing) and will read back as 0 on the Scope immediately after the write. However, the actual status flags (TZFLG) should return to 0 if the clear was successful, which is not happening here.
Access Mode: Using Specified bits mode for register access.
What could be preventing the TZFLG from clearing?
ThanksHi everyone,
I am having trouble clearing the Trip Zone flags for ePWM1 on a TMS320F28379D using the Register Read/Write blocks in Simulink.
System Configuration:
Hardware: TMS320F28379D (CPU1).
Software: MATLAB/Simulink (Embedded Coder).
Logic: I have two Register Read/Write blocks configured for Write operation:
Target: EPwm1Regs.TZCLR, bit field: OST.
Target: EPwm1Regs.TZOSTCLR, bit field: OST1.
Input: A uint16 constant of 1 is fed into both blocks.

The Issue:I am monitoring EPwm1Regs.TZFLG and EPwm1Regs.TZOSTFLG using a Scope. Even when the clear command is triggered, these flags stay at 1 and never transition to 0.
Confirmed details:
ISR Execution: The blocks are placed inside an ISR. I’ve verified the ISR is running correctly using a counter variable that increments as expected.
Register Behavior: I am aware that TZCLR and TZOSTCLR are "Write-1-to-Clear" (Self-clearing) and will read back as 0 on the Scope immediately after the write. However, the actual status flags (TZFLG) should return to 0 if the clear was successful, which is not happening here.
Access Mode: Using Specified bits mode for register access.
What could be preventing the TZFLG from clearing?
Thanks Hi everyone,
I am having trouble clearing the Trip Zone flags for ePWM1 on a TMS320F28379D using the Register Read/Write blocks in Simulink.
System Configuration:
Hardware: TMS320F28379D (CPU1).
Software: MATLAB/Simulink (Embedded Coder).
Logic: I have two Register Read/Write blocks configured for Write operation:
Target: EPwm1Regs.TZCLR, bit field: OST.
Target: EPwm1Regs.TZOSTCLR, bit field: OST1.
Input: A uint16 constant of 1 is fed into both blocks.

The Issue:I am monitoring EPwm1Regs.TZFLG and EPwm1Regs.TZOSTFLG using a Scope. Even when the clear command is triggered, these flags stay at 1 and never transition to 0.
Confirmed details:
ISR Execution: The blocks are placed inside an ISR. I’ve verified the ISR is running correctly using a counter variable that increments as expected.
Register Behavior: I am aware that TZCLR and TZOSTCLR are "Write-1-to-Clear" (Self-clearing) and will read back as 0 on the Scope immediately after the write. However, the actual status flags (TZFLG) should return to 0 if the clear was successful, which is not happening here.
Access Mode: Using Specified bits mode for register access.
What could be preventing the TZFLG from clearing?
Thanks epwm, f28379d, trip zone MATLAB Answers — New Questions

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