Why is Dead Logic detected on my Switch block when using Design Verifier?
I believe that I am experiencing a false positive when running the mathworks.sldv.deadlogic check in the Model Advisor on Simulink. The model consists of a simple Switch block with an inport, outport, and two different Constant blocks input into the data ports.
The model:
The warning reads:
"RelationalOperator: input1 ~= input2 false"I believe that I am experiencing a false positive when running the mathworks.sldv.deadlogic check in the Model Advisor on Simulink. The model consists of a simple Switch block with an inport, outport, and two different Constant blocks input into the data ports.
The model:
The warning reads:
"RelationalOperator: input1 ~= input2 false" I believe that I am experiencing a false positive when running the mathworks.sldv.deadlogic check in the Model Advisor on Simulink. The model consists of a simple Switch block with an inport, outport, and two different Constant blocks input into the data ports.
The model:
The warning reads:
"RelationalOperator: input1 ~= input2 false" dead, logic, detection, switch, block, replacement MATLAB Answers — New Questions
