I am trying to translate my Simulink design to Verilog code from HDL work flow advisor but i get the following error "Data-type ‘Fix_16_13’ is unsupported for HDL code generation " can you please help me out in this.
I am using CORDIC SINCOS core to generate sine wave its output is of Fix_16_13 and workflow advisor is giving error on this output.I am trying to translate my Simulink design to Verilog code from HDL work flow advisor but i get the following error "Data-type ‘Fix_16_13’ is unsupported for HDL code generation " can you please help me out in this.
I am using CORDIC SINCOS core to generate sine wave its output is of Fix_16_13 and workflow advisor is giving error on this output. I am trying to translate my Simulink design to Verilog code from HDL work flow advisor but i get the following error "Data-type ‘Fix_16_13’ is unsupported for HDL code generation " can you please help me out in this.
I am using CORDIC SINCOS core to generate sine wave its output is of Fix_16_13 and workflow advisor is giving error on this output. simulink, simulink hdl coder, hdl workflow advisor MATLAB Answers — New Questions

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